Intel generated a lot of press with the unveiling of their
3D, low-power Tri-Gate transistor technology
. Now it's IBM’s turn to hop into the 3D waters. Today, the company announced that it’s entered into a joint partnership with 3M to develop 3D semiconductors. They’re going about things a little bit differently than Intel, though; rather than developing chips with raised elements, IBM and 3M want to create “bricks” out of up to 100 separate silicon chips in a process known as “3D packaging.”
The press release says that theoretically, the technology could develop a silicon “brick” that brings memory, networking and processors together in a super-charged chip capable of performing 1,000 times faster than the speediest processors on the market today. That’s all conjecture and theory, of course, but it’s nice to know they’re thinking big.
The key to 3D packaging lies in adhering chips to one another with glue that is capable of transferring heat without damaging logic circuitry. That’s where 3M comes in. The company will be tasked with developing an adhesive that can meet those strict requirements as well as be applied to hundreds or thousands of chips at once. Current 3D packaging involves stacking chips one-by-one, a time-consuming procedure. IBM, on the other hand, will focus more on creating new 3D packaging processes capable of stacking hundreds of silicon wafers at once.