An interesting read - very EE oriented. Why don't you take some classes and become a CE or EE? It seems like this is a passion for you.
I do take classes in the evening, but part of me is happy to keep computers as a hobby.
Back to the article, he brings up some interesting points and is certainly knowledgable, but I am a bit leary concerning the practical application of the hypothesis. He completely ignores throughput in favor of the inverse time measure of performance and uses the vague 'general purpose workloads' for a benchmark. Based on this hypothesis, we cannot be sure that an 'optimum design' doesn't exist for several, if not every, catagory of computing in the real world.
Because most of the computing world still measures performance that way. Throughput computing is useful for a number of niche applications, but pretty much a waste of time for the volume markets.
Plus, I'm sure Paul is aware that there are different optimum designs for different workloads, but that would be a really long article if he had to delve into every niche market. I think he was generally thinking of markets that stress single thread performance in that article, since that's what concerns 99% of his readership.
Anyways, I was going to make a big point about an EE assuming that the path length is constant is simiiliar to a CS assuming frequency as being constant. I'll be brief. CPU's don't exist in some kind of an EE vacuum - software interacts with the cpu via the ISA interface. A change in the ISA, especially something as substantial as a new addressing mode, is going to greatly effect path length. The optimal cpu design considers both factors. I realize that he makes this assumption so that he can focus on his core area of expertise.
Yeah, I agree. Like I said above, Paul wasn't attempting to write a definative guide to design optimisation, just somethign to get his thoughts out on scaling and design.
Speaking of the Power processors, do you think the Power5 is going to smash the current spec scores or what? That is a mighty big piece of silicon IBM has over there!
No, the Power5 is optimised for transactional workloads and throughput, not single threaded or spec-like powerformance. I expect the Madison 9M to hold the SpecFP crown for 2004 (and possibly the SpecINT, barring anything interesting from the x86 camp). I do, however, expect the Power5 to dominate in transactional performance as well as plenty of bandwidth or throughput intensive server workloads, as that's what it was designed to do.