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 Post subject: New RWT Article
PostPosted: Tue Jun 29, 2004 5:19 am 
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Another from P. DeMone. Generally these go over the heads of 99% of the people here (myself included), but Paul often provides a better insight into the future of the MPU market than a thousand rumor sites.

In general I agree with the author in that we may yet see a resurgance of non-x86 based MPUs (namely Power and IA64) for the same reasons they dominated in the early 90s. I think that as time advances, the swarms of IPF bashers will slowly begin to silence as it becomes appearent that IA64 was the right decision to make in the long run.

I'm not saying that x86 is dead or IPF will take over anything, just that if Intel sticks to their roadmaps, the performance gap between the two lines will become a chasm in certain markets (but not the desktop). Other than IPF/Power, I see mostly incremental upgrades to x86 as neither AMD nor Intel have laid out anything revolutionary in their roadmaps and as far as I can see will mostly be making tweaks/CMP to their current cores.

http://www.realworldtech.com/page.cfm?A ... 2004172947


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PostPosted: Tue Jun 29, 2004 6:42 am 
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PostPosted: Tue Jun 29, 2004 4:51 pm 
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Quote:
The need to reduce CPU complexity over time plus the ability to integrate an increasing number of cores on a device to exploit TLP probably means that usage of CPU multi-threading techniques like SMT will diminish over time rather than grow.


Yes. I like this point. Perhaps I like the idea better. The relative simplicity of what CMP will bring the future "wide" designs would seem to be negated by the complexity and (subsequent) heat generated from an SMT design.

This is probably why Conroe and Merom won't have Hyper-Threading.

Quote:
In general I agree with the author in that we may yet see a resurgance of non-x86 based MPUs (namely Power and IA64) for the same reasons they dominated in the early 90s. I think that as time advances, the swarms of IPF bashers will slowly begin to silence as it becomes appearent that IA64 was the right decision to make in the long run.


This all depends on how long Intel sees IPF a worthy investment (or IPF shows itself to be one). The problem is that the architecture is indeed stout and superior to x86, but to what effect?

In the end we're talking about a 64-bit transition. Not the adoption of a new architecture (or a multiple of). Now that AMD and Intel have given the industry an easy-to-swallow transition capsule with AMD64/EM64T, the question is whether IA-64 will be around when it's time to make another jump in 64-bit computing?

I'd venture to guess that IA-64 will be around, but catering to the communities who needed that power in the first place (ie. scientifc, high-end servers). At that time, there is no telling if AMD64/EM64T won't start creeping in on that, either.


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 Post subject: Re: New RWT Article
PostPosted: Wed Jun 30, 2004 8:17 pm 
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Beelzebubba9 wrote:
<snip>Other than IPF/Power, I see mostly incremental upgrades to x86 as neither AMD nor Intel have laid out anything revolutionary in their roadmaps and as far as I can see will mostly be making tweaks/CMP to their current cores.


An interesting read - very EE oriented. Why don't you take some classes and become a CE or EE? It seems like this is a passion for you. Also, it seems like a few dinosaurs* are writing articles for that site. One guy said that his favorite programming language was a flavor of assembly and that he "(barely) knows C"!

Back to the article, he brings up some interesting points and is certainly knowledgable, but I am a bit leary concerning the practical application of the hypothesis. He completely ignores throughput in favor of the inverse time measure of performance and uses the vague 'general purpose workloads' for a benchmark. Based on this hypothesis, we cannot be sure that an 'optimum design' doesn't exist for several, if not every, catagory of computing in the real world.

Anyways, I was going to make a big point about an EE assuming that the path length is constant is simiiliar to a CS assuming frequency as being constant. I'll be brief. CPU's don't exist in some kind of an EE vacuum - software interacts with the cpu via the ISA interface. A change in the ISA, especially something as substantial as a new addressing mode, is going to greatly effect path length. The optimal cpu design considers both factors. I realize that he makes this assumption so that he can focus on his core area of expertise.

Speaking of the Power processors, do you think the Power5 is going to smash the current spec scores or what? That is a mighty big piece of silicon IBM has over there!

*No disrespect intended either. It is easy to become a bit flippant and say "please, C is 30 some years old", but you always need to be careful around dinosaurs, they're not only capable of pulling heavy loads (remember, they paved our roads) - they'll step on you if you're not carefull! :)


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PostPosted: Wed Jun 30, 2004 8:27 pm 
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Phalanx wrote:
At that time, there is no telling if AMD64/EM64T won't start creeping in on that, either.


Creeping?! They're swarming across the Top500* list! SGI's line of Opteron workstations has also been very successful in the scientific community. IIRC, they accounted for over 70% of the NSA computing grants last year.

* ~half the list is made of Beowulf clusters and probably 70% of those are x86. The remainder are mostly Alpha, Power, and AMD64 clusters.


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PostPosted: Thu Jul 01, 2004 5:55 am 
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Phalanx wrote:
In the end we're talking about a 64-bit transition. Not the adoption of a new architecture (or a multiple of). Now that AMD and Intel have given the industry an easy-to-swallow transition capsule with AMD64/EM64T, the question is whether IA-64 will be around when it's time to make another jump in 64-bit computing?

I'd venture to guess that IA-64 will be around, but catering to the communities who needed that power in the first place (ie. scientifc, high-end servers). At that time, there is no telling if AMD64/EM64T won't start creeping in on that, either.


IMO, IA64 will do fine in the ultra-high end where angels fear to stroll. The combination of industry support (compared to Sparc and Power), the Itanium's speed, and the massive R&D going into large I2 systems make it a tough competitor in that market. It's not that x86-64 could never get the, it's just that only Intel doesn't want to push it there and the money required to make the Opteron a real big tin CPU far outstrips AMD's net worth.

What most people miss is that the Itanium was never intended to be a P4/Opteron/whatever killer, it was a shot straight into the heart of Power/Sparc/etc. Anyone with a basic understanding of computer architecture can see that the Itanium would make a really shitty desktop CPU, and Intel didn't build it that way by mistake. AFACT, the Itanium was built to run a few certain peices of software really well (insert SpecFP joke here), and the expense of over all flexability. I think that IA64 will coninue to do well in it's target market regardless of x86-64, and x86 will continue to do well in its market.

I mean seriously, do you think that adding OMG64BITS to a Opteron/Xeon is going to get it to 2200 in SpecFP? I didn't think so... Or making the Montecito 3x as fast as the Madison is going to mean anything to Joe Admin and his Dual Xeon 1.7Ghz rackmount?

But almost more importantly, Intel has publically stated that by 2007 the Itanium (Tukwila I assume) will offer twice the performance of the Xeon at the same platfrom/CPU cost. If Intel can keep this promise (and I think it's possible), what will that do to the MPU shakedown?


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 Post subject: Re: New RWT Article
PostPosted: Thu Jul 01, 2004 6:15 am 
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Gadget wrote:
An interesting read - very EE oriented. Why don't you take some classes and become a CE or EE? It seems like this is a passion for you.


I do take classes in the evening, but part of me is happy to keep computers as a hobby.

Gadget wrote:
Back to the article, he brings up some interesting points and is certainly knowledgable, but I am a bit leary concerning the practical application of the hypothesis. He completely ignores throughput in favor of the inverse time measure of performance and uses the vague 'general purpose workloads' for a benchmark. Based on this hypothesis, we cannot be sure that an 'optimum design' doesn't exist for several, if not every, catagory of computing in the real world.


Because most of the computing world still measures performance that way. Throughput computing is useful for a number of niche applications, but pretty much a waste of time for the volume markets.

Plus, I'm sure Paul is aware that there are different optimum designs for different workloads, but that would be a really long article if he had to delve into every niche market. I think he was generally thinking of markets that stress single thread performance in that article, since that's what concerns 99% of his readership.

Gadget wrote:
Anyways, I was going to make a big point about an EE assuming that the path length is constant is simiiliar to a CS assuming frequency as being constant. I'll be brief. CPU's don't exist in some kind of an EE vacuum - software interacts with the cpu via the ISA interface. A change in the ISA, especially something as substantial as a new addressing mode, is going to greatly effect path length. The optimal cpu design considers both factors. I realize that he makes this assumption so that he can focus on his core area of expertise.


Yeah, I agree. Like I said above, Paul wasn't attempting to write a definative guide to design optimisation, just somethign to get his thoughts out on scaling and design.

Gadget wrote:
Speaking of the Power processors, do you think the Power5 is going to smash the current spec scores or what? That is a mighty big piece of silicon IBM has over there!


No, the Power5 is optimised for transactional workloads and throughput, not single threaded or spec-like powerformance. I expect the Madison 9M to hold the SpecFP crown for 2004 (and possibly the SpecINT, barring anything interesting from the x86 camp). I do, however, expect the Power5 to dominate in transactional performance as well as plenty of bandwidth or throughput intensive server workloads, as that's what it was designed to do.


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 Post subject:
PostPosted: Thu Jul 01, 2004 6:25 am 
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Gadget wrote:
Phalanx wrote:
At that time, there is no telling if AMD64/EM64T won't start creeping in on that, either.


Creeping?! They're swarming across the Top500* list! SGI's line of Opteron workstations has also been very successful in the scientific community. IIRC, they accounted for over 70% of the NSA computing grants last year.

* ~half the list is made of Beowulf clusters and probably 70% of those are x86. The remainder are mostly Alpha, Power, and AMD64 clusters.


At this point, IA-64 has it's niche. I couldn't tell you exactly what that is at the moment, but the IA-64/Power crowd is still separate from the x86/AMD64 crowd.

I think that's what I was trying to say. :)


Last edited by Phalanx on Thu Jul 01, 2004 2:55 pm, edited 1 time in total.

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PostPosted: Thu Jul 01, 2004 1:12 pm 
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Beelzebubba9 wrote:
IMO, IA64 will do fine in the ultra-high end where angels fear to stroll. The combination of industry support (compared to Sparc and Power), the Itanium's speed, and the massive R&D going into large I2 systems make it a tough competitor in that market. It's not that x86-64 could never get the, it's just that only Intel doesn't want to push it there and the money required to make the Opteron a real big tin CPU far outstrips AMD's net worth.


Absolutely.

Quote:
What most people miss is that the Itanium was never intended to be a P4/Opteron/whatever killer, it was a shot straight into the heart of Power/Sparc/etc.


Regardless, Opteron and Xeon are well equipped to scale and meet the needs of many (perhaps not most) potential Itanium customers should the opportunity arise.

Quote:
I think that IA64 will coninue to do well in it's target market regardless of x86-64, and x86 will continue to do well in its market.


As do I.

Quote:
I mean seriously, do you think that adding OMG64BITS to a Opteron/Xeon is going to get it to 2200 in SpecFP? I didn't think so... Or making the Montecito 3x as fast as the Madison is going to mean anything to Joe Admin and his Dual Xeon 1.7Ghz rackmount?


That really depends on the customer and their needs. Opteron and Nocona now present a low, mid and upper-mid range for 64-bit computing. A new market has opened up.

Quote:
But almost more importantly, Intel has publically stated that by 2007 the Itanium (Tukwila I assume) will offer twice the performance of the Xeon at the same platfrom/CPU cost. If Intel can keep this promise (and I think it's possible), what will that do to the MPU shakedown?


Here's the way I see it. Itanium has to sell itself as a platform, plain and simple. Regardless of how powerful it is, if the platform isn't appealing, how fast it is in Spec doesn't mean a thing. For those who have and will adopt the IPF for their needs, I'd imagine Intel's plans for IPF have them excited.


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