Maximum PC

So I have been throwing the idea of Bulldozer (AMD's new 'FX' architecture) around for quite some time. I decided to write a 'wandering?' about it a few days ago and this is what i have come up with.

1) An intro to Bulldozer.
2) An in depth look at what we know.
3) Realistic expectations?
4) What I wish it was and why.


1- Bulldozer is a code name given to a new circuit architecture for AMD's new 'FX' line of processors. The idea was started sometime after 2003, which was the last major over haul of an architecture by AMD. for a better intro please refer to this.

2- What we actually know can be a little hard to read, with all the hype. I will try to give what I believe to be the actual facts, and not include rumors about clock speed, TDP, PPW, etc...

The first thing we all know is that AMD is currently losing it's lunch money to Intel, and not just to the big bad 990X but to Sandy Bridge and and almost everything else. Which brings us to the point AMD needs Bulldozer to excel, they can't have another Phenom debacle or it might be lights out for the underdog with Intel's new Tri-gate-transistors on the horizon.

Bulldozer will be built using a 32nm SOI HKMG process at Global Foundries (Dresden Germany) this doesn't strike anyone as ground breaking because it has already been done by Intel.(Intel doesn't use SOI though)

What will separate Bulldozer from Intel implementations is how it handles Multi-Threading. Intel has Hyper-Threading which uses the portion of a cores left over grunt in a clock cycle and throws more data at it, thus forcing it to crunch the maximum amount of data per clock. AMD's Bulldozer will use separate physical cores paired in twos called modules to handle Multi-Threading.(i) The cores of a module share a floating point unit with two 128-bit FMAC units and two 128-bit integer SIMD units, and a L2 cache. Multiple modules share a L3 cache as well as an Advanced Dual-Channel Memory Sub-System (IMC - Integrated Memory Controller). Bulldozer is designed for higher memory level parallelism. AMD also states that the new CPU will feature “Extensive New Power Management Innovations”. The new chips that belong to Bulldozer’s family will also support “Advanced Vector Extensions” (AVX) that supports 256-bit FP operations (i=credit wikipedia)

From what we know so far we can say that on screen and or paper AMD's 'brute force' approach seems better I mean why would you want one core and a virtual core (Intel) when you could have two physical cores, right ?

Next there is the dual channel memory controller, seriously don't know where they are going with this one... Intel already has triple channel and one would think that this would have been a given. NO. While the Opteron Bulldozer parts will have a quad channel memory controller, the 'FX' series will be limited to dual, given the fact they the upped the supported DDR-3 speed to 1866 I'm still not pleased by this.

3- Realistic Expectations, what is realistic ? I am sure by now if you follow the rumor mills you have heard that Bulldozers are 1.5-2 times faster than a Core i-7.... I want to believe this to, call me a 'fanboy' IDC. The truth of the matter is that we shouldn't set our hopes to high until a reliable source (MPC, Tom's HW, Anandtech etc..) can tell us the unadulterated numbers. I myself would be happy if AMD could just catch and be on par with Intel.

4- What I wish Bulldozer was and why.

A way to completely do away with threading, yeah I said it... Not that I don't enjoy multi-core performance, I just think that we are doing it wrong. You may ask yourself how I came to this conclusion and the answer is short, I own a business that designs and innovates on existing designs, in addition to our well established computer and internet services.

I happen to have the following information Copyrighted, so I will share it, on the condition that it is not shared without consent.

I think that multi-core processors should be monolithic, for example take a bulldozer module and instead of two cores put eight inside of it. When the information entered the proc it would be split into chunks, each core would receive X amount of chunks, where X is maximum load for the core lets say 2 128 bit chunks, the cores would receive the information in order from 1-8 (1,2,3,4,5,6,7,8,1,2,3,4,5,6,7,8,1,2 etc...) with each repeating cycle representing a clock-cycle. after the information was handled by the core it would be sent to a decode unit that would put it together and spit it out.

Why would this be great ? Well for one thing this design would be seen by the Operating System As one core, assuming you had eight cores inside @ 3.00 GHZ you have now given the OS a 24 GHZ proc as well as any application, multi threaded or not, I call it hardware-Threading. Eliminating the need for programers to multi-thread apps would be great, and the fact that you can move threading to the hardware means that everything would speed up, not just certain apps...

In conclusion, I hope that you find this rant/wandering intriguing. Please let me know what you think about Bulldozer and your expectations as well as what you think about Hardware-Threading...

-Cody