The i5s and P55 Chipset DO use QPI. In the P45 & older chipsets, they used to connect to the memory & PCI-express slots via the frontside bus. In the Core i5/i7, the CPU is connected to the memory via 1 QPI interface and PCI-express is built-in to the CPU die (thus the reason for the low total bandwidth in the p55 chipset). The P55 chipset is then connected to the south bridge (ICH 10) via a DMI interface. On the 1366 platform, EVERYTHING is connected together via QPI interfaces. One to the memory, one to the X58 north bridge, one to the ICH 10 south bridge and one to PCI-express for a total of 4. Hope that clears it up some for you.