New PCI Standard Delayed Until Mid-2010

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LatiosXT

The article is very misleading. According to our loveable Wikipedia, PCI is already 3.0, and it's the final version.

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SodaAnt

Somehow, neither this or the source article make it clear that it's pci-e 3.0, not pci 3.0. First of all, pcihas nowhere near 32Gb/s bandwith, and second, the source article makes refrences to high end graphics cards, which haven't run on pci for years. Third, the article has a picture of a 4850X2, which is a pci-e card.

 

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SodaAnt

Somehow, neither this or the source article make it clear that it's pci-e 3.0, not pci 3.0. First of all, pcihas nowhere near 32Gb/s bandwith, and second, the source article makes refrences to high end graphics cards, which haven't run on pci for years. Third, the article has a picture of a 4850X2, which is a pci-e card.

 

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Gailim

why do we need this on boards? setups like the P6T6 are the future, not an updated PCI

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ogremustcrush

I didn't realize that PCI was still being updated. I though it was pretty much dead, superceeded by PCIE like it succeeded ISA. I guess if they're going to throw 1 or 2 on a board anyway for people with legacy equipment, they could stand to be faster, but wont updating the bus just impede the introduction of more PCIE equipment? PCI uses a parallel bus which is inferior in several ways to the serial bus used in PCIE, most interfaces in the PC have moved to serial busses because of the issues with clocking a parallel bus past a certain point. I don't know why they would want to keep moving on this old pardigm.

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ogremustcrush

I didn't realize that PCI was still being updated. I though it was pretty much dead, superceeded by PCIE like it succeeded ISA. I guess if they're going to throw 1 or 2 on a board anyway for people with legacy equipment, they could stand to be faster, but wont updating the bus just impede the introduction of more PCIE equipment? PCI uses a parallel bus which is inferior in several ways to the serial bus used in PCIE, most interfaces in the PC have moved to serial busses because of the issues with clocking a parallel bus past a certain point. I don't know why they would want to keep moving on this old pardigm.

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sbradford26

They are talking about pci express 3.0 in this article if you look at the last paragraph.  

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