Intel Details Xeon E5 Server Chips and Knights Corner Silicon

Posted 11/16/2011 at 8:07am | by Paul Lilly

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It wouldn't be a supercomputing conference without Intel in attendance, and at SC11 this week, the chip maker offered up details about its Xeon E5 family and Knights Corner MIC (many integrated core) platform. Slated to ship sometime in the first half of 2012, Intel's Xeon E5 processors share the same DNA as the Core i7 3960X that's making the rounds on the Web, and is the world's first server chip to support full integration of the PCI Express 3.0 specification, Intel claims.

According to Intel, early performance benchmarks peg Xeon E5 as being capable of delivering up to 2.1 times more performance in raw FLOPS and up to 70 percent more performance using real-HPC workloads compared to the previous generation of Xeon 5600 series processors. The Xeon E5 processors now power 10 systems on the Top500 List of supercomputers.

"Customer acceptance of the Intel Xeon E5 processor has exceeded our expectations and is driving the fastest debut on the TOP500 list of any processor in Intel’s history," said Rajeeb Hazra, General Manager of Intel Technical Computing Group. "Collecting, analyzing and sharing large amounts of information is critical to today’s science activities and requires new levels of processor performance and technologies designed precisely for this purpose."

Intel also demoed the first silicon of its "Knights Corner" co-processor and showed that it's capable of delivering more than 1 TFLOPs of double precision floating point performance with a single chip.

"Intel first demonstrated a Teraflop supercomputer utilizing 9,680 Intel Pentium Pro Processors in 1997 as part of Sandia Lab’s 'ASCI RED' system," Hazra said. "Having this performance now in a single chip based on Intel MIC architecture is a milestone that will once again be etched into HPC history."

Knights Corner is the first commercial Intel MIC architecture product and will manufactured using the chip maker's latest 3D Tri-Gate 22nm transistor processor. It will feature more than 50 cores and sport compatibility with existing x86 programming model and tools, Intel says.

Image Credit: Intel